	.data
	.align	2
	.globl	class_nameTab
	.globl	Main_protObj
	.globl	Int_protObj
	.globl	String_protObj
	.globl	bool_const0
	.globl	bool_const1
	.globl	_int_tag
	.globl	_bool_tag
	.globl	_string_tag
	.globl	_MemMgr_INITIALIZER
	.globl	_MemMgr_COLLECTOR
	.globl	_MemMgr_TEST
_MemMgr_INITIALIZER:
	.word	_NoGC_Init
_MemMgr_COLLECTOR:
	.word	_NoGC_Collect
_MemMgr_TEST:
	.word	0
_int_tag:
	.word	1
_bool_tag:
	.word	2
_string_tag:
	.word	3
str_const75:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const1
	.byte	0, 0, 0, 0
str_const74:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const2
	.ascii	"Main"
	.byte	0, 0, 0, 0
str_const73:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const2
	.ascii	"Term"
	.byte	0, 0, 0, 0
str_const72:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const3
	.ascii	"App"
	.byte	0
str_const71:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const4
	.ascii	"Lambda"
	.byte	0, 0
str_const70:
	.word	3
	.word	7
	.word	String_dispatch
	.word	int_const5
	.ascii	"Variable"
	.byte	0, 0, 0, 0
str_const69:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const2
	.ascii	"Expr"
	.byte	0, 0, 0, 0
str_const68:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"LambdaListRef"
	.byte	0, 0, 0
str_const67:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const7
	.ascii	"LambdaListNE"
	.byte	0, 0, 0, 0
str_const66:
	.word	3
	.word	7
	.word	String_dispatch
	.word	int_const8
	.ascii	"LambdaList"
	.byte	0, 0
str_const65:
	.word	3
	.word	7
	.word	String_dispatch
	.word	int_const9
	.ascii	"VarListNE"
	.byte	0, 0, 0
str_const64:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const10
	.ascii	"VarList"
	.byte	0
str_const63:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const11
	.ascii	"IO"
	.byte	0, 0
str_const62:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const4
	.ascii	"String"
	.byte	0, 0
str_const61:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const2
	.ascii	"Bool"
	.byte	0, 0, 0, 0
str_const60:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const3
	.ascii	"Int"
	.byte	0
str_const59:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const4
	.ascii	"Object"
	.byte	0, 0
str_const58:
	.word	3
	.word	7
	.word	String_dispatch
	.word	int_const8
	.ascii	"_prim_slot"
	.byte	0, 0
str_const57:
	.word	3
	.word	7
	.word	String_dispatch
	.word	int_const9
	.ascii	"SELF_TYPE"
	.byte	0, 0, 0
str_const56:
	.word	3
	.word	7
	.word	String_dispatch
	.word	int_const9
	.ascii	"_no_class"
	.byte	0, 0, 0
str_const55:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"<basic class>"
	.byte	0, 0, 0
str_const54:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const10
	.ascii	"\n};\n};\n"
	.byte	0
str_const53:
	.word	3
	.word	11
	.word	String_dispatch
	.word	int_const12
	.ascii	"  main() : EvalObject {\n"
	.byte	0, 0, 0, 0
str_const52:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"class Main {\n"
	.byte	0, 0, 0
str_const51:
	.word	3
	.word	17
	.word	String_dispatch
	.word	int_const13
	.ascii	"(*Generated by lam.cl (Jeff Foster, March 2000)*)\n"
	.byte	0, 0
str_const50:
	.word	3
	.word	16
	.word	String_dispatch
	.word	int_const14
	.ascii	"\n------------------cut here------------------\n"
	.byte	0, 0
str_const49:
	.word	3
	.word	10
	.word	String_dispatch
	.word	int_const15
	.ascii	"Generating code for "
	.byte	0, 0, 0, 0
str_const48:
	.word	3
	.word	20
	.word	String_dispatch
	.word	int_const16
	.ascii	"  apply(y : EvalObject) : EvalObject { { abort(); self; } };\n"
	.byte	0, 0, 0
str_const47:
	.word	3
	.word	19
	.word	String_dispatch
	.word	int_const17
	.ascii	"  init(p : Closure) : Closure {{ parent <- p; self; }};\n"
	.byte	0, 0, 0, 0
str_const46:
	.word	3
	.word	12
	.word	String_dispatch
	.word	int_const18
	.ascii	"  get_x() : EvalObject { x };\n"
	.byte	0, 0
str_const45:
	.word	3
	.word	14
	.word	String_dispatch
	.word	int_const19
	.ascii	"  get_parent() : Closure { parent };\n"
	.byte	0, 0, 0
str_const44:
	.word	3
	.word	9
	.word	String_dispatch
	.word	int_const20
	.ascii	"  x : EvalObject;\n"
	.byte	0, 0
str_const43:
	.word	3
	.word	10
	.word	String_dispatch
	.word	int_const15
	.ascii	"  parent : Closure;\n"
	.byte	0, 0, 0, 0
str_const42:
	.word	3
	.word	14
	.word	String_dispatch
	.word	int_const21
	.ascii	"class Closure inherits EvalObject {\n"
	.byte	0, 0, 0, 0
str_const41:
	.word	3
	.word	16
	.word	String_dispatch
	.word	int_const14
	.ascii	"  eval() : EvalObject { { abort(); self; } };\n"
	.byte	0, 0
str_const40:
	.word	3
	.word	12
	.word	String_dispatch
	.word	int_const22
	.ascii	"class EvalObject inherits IO {\n"
	.byte	0
str_const39:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const2
	.ascii	" =>\n"
	.byte	0, 0, 0, 0
str_const38:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"beta-reduce: "
	.byte	0, 0, 0
str_const37:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.ascii	"z"
	.byte	0, 0, 0
str_const36:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.ascii	"y"
	.byte	0, 0, 0
str_const35:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.ascii	"x"
	.byte	0, 0, 0
str_const34:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const10
	.ascii	"  esac)"
	.byte	0
str_const33:
	.word	3
	.word	17
	.word	String_dispatch
	.word	int_const23
	.ascii	"    o : Object => { abort(); new EvalObject; };\n"
	.byte	0, 0, 0, 0
str_const32:
	.word	3
	.word	12
	.word	String_dispatch
	.word	int_const22
	.ascii	"    c : Closure => c.apply(y);\n"
	.byte	0
str_const31:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const7
	.ascii	"  case x of\n"
	.byte	0, 0, 0, 0
str_const30:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const2
	.ascii	" in\n"
	.byte	0, 0, 0, 0
str_const29:
	.word	3
	.word	10
	.word	String_dispatch
	.word	int_const24
	.ascii	"     y : EvalObject <- "
	.byte	0
str_const28:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const11
	.ascii	",\n"
	.byte	0, 0
str_const27:
	.word	3
	.word	10
	.word	String_dispatch
	.word	int_const24
	.ascii	"(let x : EvalObject <- "
	.byte	0
str_const26:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const11
	.ascii	"))"
	.byte	0, 0
str_const25:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const3
	.ascii	")@("
	.byte	0
str_const24:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const11
	.ascii	"(("
	.byte	0, 0
str_const23:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const3
	.ascii	"};\n"
	.byte	0
str_const22:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const25
	.ascii	";}};\n"
	.byte	0, 0, 0
str_const21:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const26
	.ascii	"      x <- y;\n"
	.byte	0, 0
str_const20:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const4
	.byte	92
	.ascii	"n\");\n"
	.byte	0, 0
str_const19:
	.word	3
	.word	13
	.word	String_dispatch
	.word	int_const27
	.ascii	"    { out_string(\"Applying closure "
	.byte	0
str_const18:
	.word	3
	.word	14
	.word	String_dispatch
	.word	int_const28
	.ascii	"  apply(y : EvalObject) : EvalObject {\n"
	.byte	0
str_const17:
	.word	3
	.word	10
	.word	String_dispatch
	.word	int_const15
	.ascii	" inherits Closure {\n"
	.byte	0, 0, 0, 0
str_const16:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"class Closure"
	.byte	0, 0, 0
str_const15:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const4
	.ascii	"self))"
	.byte	0, 0
str_const14:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"new Closure))"
	.byte	0, 0, 0
str_const13:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const10
	.ascii	").init("
	.byte	0
str_const12:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"((new Closure"
	.byte	0, 0, 0
str_const11:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.ascii	"."
	.byte	0, 0, 0
str_const10:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.byte	92
	.byte	0, 0, 0
str_const9:
	.word	3
	.word	6
	.word	String_dispatch
	.word	int_const10
	.ascii	"get_x()"
	.byte	0
str_const8:
	.word	3
	.word	11
	.word	String_dispatch
	.word	int_const29
	.ascii	"Error:  free occurrence of "
	.byte	0
str_const7:
	.word	3
	.word	8
	.word	String_dispatch
	.word	int_const6
	.ascii	"get_parent()."
	.byte	0, 0, 0
str_const6:
	.word	3
	.word	16
	.word	String_dispatch
	.word	int_const30
	.ascii	"\nError: Expr is pure virtual; can't gen_code\n"
	.byte	0, 0, 0
str_const5:
	.word	3
	.word	16
	.word	String_dispatch
	.word	int_const31
	.ascii	"\nError: Expr is pure virtual; can't substitute\n"
	.byte	0
str_const4:
	.word	3
	.word	17
	.word	String_dispatch
	.word	int_const23
	.ascii	"\nError: Expr is pure virtual; can't beta-reduce\n"
	.byte	0, 0, 0, 0
str_const3:
	.word	3
	.word	16
	.word	String_dispatch
	.word	int_const31
	.ascii	"\nError: Expr is pure virtual; can't print self\n"
	.byte	0
str_const2:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.ascii	" "
	.byte	0, 0, 0
str_const1:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const0
	.ascii	"\n"
	.byte	0, 0, 0
str_const0:
	.word	3
	.word	11
	.word	String_dispatch
	.word	int_const12
	.ascii	"tests/advanced/ok/lam.cl"
	.byte	0, 0, 0, 0
int_const31:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	47
int_const30:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	45
int_const29:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	27
int_const28:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	39
int_const27:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	35
int_const26:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	14
int_const25:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	5
int_const24:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	23
int_const23:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	48
int_const22:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	31
int_const21:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	36
int_const20:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	18
int_const19:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	37
int_const18:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	30
int_const17:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	56
int_const16:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	61
int_const15:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	20
int_const14:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	46
int_const13:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	50
int_const12:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	24
int_const11:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	2
int_const10:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	7
int_const9:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	9
int_const8:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	10
int_const7:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	12
int_const6:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	13
int_const5:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	8
int_const4:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	6
int_const3:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	3
int_const2:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	4
int_const1:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	0
int_const0:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	1
bool_const1:
	.word	2
	.word	4
	.word	Object_dispatch
	.word	1
bool_const0:
	.word	2
	.word	4
	.word	Object_dispatch
	.word	0
class_nameTab:
	.word	str_const59
	.word	str_const60
	.word	str_const61
	.word	str_const62
	.word	str_const63
	.word	str_const66
	.word	str_const68
	.word	str_const67
	.word	str_const64
	.word	str_const69
	.word	str_const73
	.word	str_const74
	.word	str_const70
	.word	str_const71
	.word	str_const72
	.word	str_const65
class_objTab:
	.word	Object_protObj
	.word	Object_init
	.word	Int_protObj
	.word	Int_init
	.word	Bool_protObj
	.word	Bool_init
	.word	String_protObj
	.word	String_init
	.word	IO_protObj
	.word	IO_init
	.word	LambdaList_protObj
	.word	LambdaList_init
	.word	LambdaListRef_protObj
	.word	LambdaListRef_init
	.word	LambdaListNE_protObj
	.word	LambdaListNE_init
	.word	VarList_protObj
	.word	VarList_init
	.word	Expr_protObj
	.word	Expr_init
	.word	Term_protObj
	.word	Term_init
	.word	Main_protObj
	.word	Main_init
	.word	Variable_protObj
	.word	Variable_init
	.word	Lambda_protObj
	.word	Lambda_init
	.word	App_protObj
	.word	App_init
	.word	VarListNE_protObj
	.word	VarListNE_init
Object_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
String_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	String.concat
	.word	String.length
	.word	String.substr
IO_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
LambdaList_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	LambdaList.isNil
	.word	LambdaList.headE
	.word	LambdaList.headC
	.word	LambdaList.headN
	.word	LambdaList.tail
	.word	LambdaList.add
LambdaListRef_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	LambdaListRef.isNil
	.word	LambdaListRef.headE
	.word	LambdaListRef.headC
	.word	LambdaListRef.headN
	.word	LambdaListRef.reset
	.word	LambdaListRef.add
	.word	LambdaListRef.removeHead
LambdaListNE_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	LambdaListNE.isNil
	.word	LambdaListNE.headE
	.word	LambdaListNE.headC
	.word	LambdaListNE.headN
	.word	LambdaListNE.tail
	.word	LambdaList.add
	.word	LambdaListNE.init
VarList_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	VarList.isNil
	.word	VarList.head
	.word	VarList.tail
	.word	VarList.add
	.word	VarList.print
Expr_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	Expr.print_self
	.word	Expr.beta
	.word	Expr.substitute
	.word	Expr.gen_code
Term_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	Term.var
	.word	Term.lam
	.word	Term.app
	.word	Term.i
	.word	Term.k
	.word	Term.s
Main_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	Term.var
	.word	Term.lam
	.word	Term.app
	.word	Term.i
	.word	Term.k
	.word	Term.s
	.word	Main.beta_reduce
	.word	Main.eval_class
	.word	Main.closure_class
	.word	Main.gen_code
	.word	Main.main
Variable_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	Variable.print_self
	.word	Variable.beta
	.word	Variable.substitute
	.word	Variable.gen_code
	.word	Variable.init
Lambda_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	Lambda.print_self
	.word	Lambda.beta
	.word	Lambda.substitute
	.word	Lambda.gen_code
	.word	Lambda.init
	.word	Lambda.apply
	.word	Lambda.gen_closure_code
App_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	App.print_self
	.word	App.beta
	.word	App.substitute
	.word	App.gen_code
	.word	App.init
VarListNE_dispatch:
	.word	Object.abort
	.word	Object.copy
	.word	Object.type_name
	.word	IO.out_string
	.word	IO.out_int
	.word	IO.in_string
	.word	IO.in_int
	.word	VarListNE.isNil
	.word	VarListNE.head
	.word	VarListNE.tail
	.word	VarList.add
	.word	VarListNE.print
	.word	VarListNE.init
Object_protObj:
	.word	0
	.word	3
	.word	Object_dispatch
Int_protObj:
	.word	1
	.word	4
	.word	Object_dispatch
	.word	0
Bool_protObj:
	.word	2
	.word	4
	.word	Object_dispatch
	.word	0
String_protObj:
	.word	3
	.word	5
	.word	String_dispatch
	.word	int_const1
	.word	0
IO_protObj:
	.word	4
	.word	3
	.word	IO_dispatch
LambdaList_protObj:
	.word	5
	.word	3
	.word	LambdaList_dispatch
LambdaListRef_protObj:
	.word	6
	.word	5
	.word	LambdaListRef_dispatch
	.word	0
	.word	0
LambdaListNE_protObj:
	.word	7
	.word	7
	.word	LambdaListNE_dispatch
	.word	0
	.word	0
	.word	0
	.word	0
VarList_protObj:
	.word	8
	.word	3
	.word	VarList_dispatch
Expr_protObj:
	.word	9
	.word	3
	.word	Expr_dispatch
Term_protObj:
	.word	10
	.word	3
	.word	Term_dispatch
Main_protObj:
	.word	11
	.word	3
	.word	Main_dispatch
Variable_protObj:
	.word	12
	.word	4
	.word	Variable_dispatch
	.word	str_const75
Lambda_protObj:
	.word	13
	.word	5
	.word	Lambda_dispatch
	.word	0
	.word	0
App_protObj:
	.word	14
	.word	5
	.word	App_dispatch
	.word	0
	.word	0
VarListNE_protObj:
	.word	15
	.word	5
	.word	VarListNE_dispatch
	.word	0
	.word	0
heap_start:
	.word	0

	.text
	.globl	Int_init
	.globl	String_init
	.globl	Bool_init
	.globl	Main_init
	.globl	Main.main
void_disp_handler:
	lw	$t1, 4 ($sp)
	jal	_dispatch_abort
void_case_handler:
	lw	$t1, 4 ($sp)
	jal	_case_abort2
# Mapping: 
# To spill: 
Object_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	j	__Object_init_epilogue
__Object_init_epilogue:
	## restoring registers
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: 
# To spill: 
Int_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	j	__Int_init_epilogue
__Int_init_epilogue:
	## restoring registers
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: 
# To spill: 
Bool_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	j	__Bool_init_epilogue
__Bool_init_epilogue:
	## restoring registers
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: 
# To spill: 
String_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	j	__String_init_epilogue
__String_init_epilogue:
	## restoring registers
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: 
# To spill: 
IO_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	j	__IO_init_epilogue
__IO_init_epilogue:
	## restoring registers
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
LambdaList_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	Object_init
	move	$a0, $s0
	j	__LambdaList_init_epilogue
__LambdaList_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListRef_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	Object_init
	li	$s1, 0
	sw	$s1, 12 ($s0)
	move	$a0, $s0
	j	__LambdaListRef_init_epilogue
__LambdaListRef_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListNE_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	LambdaList_init
	li	$s1, 0
	sw	$s1, 16 ($s0)
	move	$a0, $s0
	j	__LambdaListNE_init_epilogue
__LambdaListNE_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
VarList_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	IO_init
	move	$a0, $s0
	j	__VarList_init_epilogue
__VarList_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
Expr_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	IO_init
	move	$a0, $s0
	j	__Expr_init_epilogue
__Expr_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
Term_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	IO_init
	move	$a0, $s0
	j	__Term_init_epilogue
__Term_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
Main_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	Term_init
	move	$a0, $s0
	j	__Main_init_epilogue
__Main_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
Variable_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	Expr_init
	move	$a0, $s0
	j	__Variable_init_epilogue
__Variable_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
Lambda_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	Expr_init
	move	$a0, $s0
	j	__Lambda_init_epilogue
__Lambda_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
App_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	Expr_init
	move	$a0, $s0
	j	__App_init_epilogue
__App_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 
# To spill: 
VarListNE_init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	jal	VarList_init
	move	$a0, $s0
	j	__VarListNE_init_epilogue
__VarListNE_init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 
# To spill: 
LambdaList.isNil:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	li	$s0, 1
	move	$a0, $s0
	j	__LambdaList.isNil_epilogue
__LambdaList.isNil_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaList.headE:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid0
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 46
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid0:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 0 ($s0)
	jalr	$s0
	move	$s1, $a0
	la	$s1, VarList_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	VarList_init
	move	$a0, $s1
	j	__LambdaList.headE_epilogue
__LambdaList.headE_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaList.headC:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid1
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 47
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid1:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 0 ($s0)
	jalr	$s0
	move	$s1, $a0
	la	$s1, Lambda_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	Lambda_init
	move	$a0, $s1
	j	__LambdaList.headC_epilogue
__LambdaList.headC_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaList.headN:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid2
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 48
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid2:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 0 ($s0)
	jalr	$s0
	move	$s1, $a0
	li	$s1, 0
	move	$a0, $s1
	j	__LambdaList.headN_epilogue
__LambdaList.headN_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaList.tail:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid3
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 49
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid3:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 0 ($s0)
	jalr	$s0
	move	$s1, $a0
	la	$s1, LambdaList_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	LambdaList_init
	move	$a0, $s1
	j	__LambdaList.tail_epilogue
__LambdaList.tail_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 VR6:$s1 VR7:$s2 VR8:$s3 
# To spill: 
LambdaList.add:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($fp)
	lw	$s2, 12 ($fp)
	lw	$s3, 8 ($fp)
	la	$s4, LambdaListNE_protObj
	move	$a0, $s4
	jal	Object.copy
	move	$s4, $a0
	jal	LambdaListNE_init
	bnez	$s4, dispatch_notvoid4
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 51
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid4:
	move	$s5, $s1
	move	$s1, $s2
	move	$s2, $s3
	move	$s3, $s0
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 36 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$a0, $s4
	j	__LambdaList.add_epilogue
__LambdaList.add_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 20
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaListRef.isNil:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid5
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 79
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid5:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 12 ($s0)
	jalr	$s0
	move	$s1, $a0
	move	$a0, $s1
	j	__LambdaListRef.isNil_epilogue
__LambdaListRef.isNil_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaListRef.headE:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid6
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 80
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid6:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 16 ($s0)
	jalr	$s0
	move	$s1, $a0
	move	$a0, $s1
	j	__LambdaListRef.headE_epilogue
__LambdaListRef.headE_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaListRef.headC:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid7
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 81
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid7:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 20 ($s0)
	jalr	$s0
	move	$s1, $a0
	move	$a0, $s1
	j	__LambdaListRef.headC_epilogue
__LambdaListRef.headC_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
LambdaListRef.headN:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid8
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 82
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid8:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 24 ($s0)
	jalr	$s0
	move	$s1, $a0
	move	$a0, $s1
	j	__LambdaListRef.headN_epilogue
__LambdaListRef.headN_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListRef.reset:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	li	$s1, 0
	sw	$s1, 12 ($s0)
	la	$s1, LambdaList_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	LambdaList_init
	sw	$s1, 16 ($s0)
	move	$s1, $s0
	move	$a0, $s1
	j	__LambdaListRef.reset_epilogue
__LambdaListRef.reset_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s1 VR6:$s2 
# To spill: 
LambdaListRef.add:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	lw	$s3, 16 ($s0)
	bnez	$s3, dispatch_notvoid9
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 92
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid9:
	move	$s4, $s1
	move	$s1, $s2
	lw	$s2, 12 ($s0)
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 32 ($s4)
	jalr	$s4
	move	$s3, $a0
	sw	$s3, 16 ($s0)
	lw	$s3, 12 ($s0)
	li	$s4, 1
	add	$s3, $s3, $s4
	sw	$s3, 12 ($s0)
	lw	$s3, 12 ($s0)
	li	$s4, 1
	sub	$s3, $s3, $s4
	move	$a0, $s3
	j	__LambdaListRef.add_epilogue
__LambdaListRef.add_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
LambdaListRef.removeHead:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid10
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 99
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid10:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	sw	$s1, 16 ($s0)
	move	$s1, $s0
	move	$a0, $s1
	j	__LambdaListRef.removeHead_epilogue
__LambdaListRef.removeHead_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 
# To spill: 
LambdaListNE.isNil:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	li	$s0, 0
	move	$a0, $s0
	j	__LambdaListNE.isNil_epilogue
__LambdaListNE.isNil_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListNE.headE:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 20 ($s0)
	move	$a0, $s1
	j	__LambdaListNE.headE_epilogue
__LambdaListNE.headE_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListNE.headC:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($s0)
	move	$a0, $s1
	j	__LambdaListNE.headC_epilogue
__LambdaListNE.headC_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListNE.headN:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	move	$a0, $s1
	j	__LambdaListNE.headN_epilogue
__LambdaListNE.headN_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
LambdaListNE.tail:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 24 ($s0)
	move	$a0, $s1
	j	__LambdaListNE.tail_epilogue
__LambdaListNE.tail_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 
# To spill: 
LambdaListNE.init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 20 ($fp)
	lw	$s2, 16 ($fp)
	lw	$s3, 12 ($fp)
	lw	$s4, 8 ($fp)
	move	$s5, $s1
	sw	$s5, 20 ($s0)
	move	$s5, $s2
	sw	$s5, 12 ($s0)
	move	$s5, $s3
	sw	$s5, 16 ($s0)
	move	$s5, $s4
	sw	$s5, 24 ($s0)
	move	$s5, $s0
	move	$a0, $s5
	j	__LambdaListNE.init_epilogue
__LambdaListNE.init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 24
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 
# To spill: 
VarList.isNil:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	li	$s0, 1
	move	$a0, $s0
	j	__VarList.isNil_epilogue
__VarList.isNil_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
VarList.head:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid11
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 23
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid11:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 0 ($s0)
	jalr	$s0
	move	$s1, $a0
	la	$s1, Variable_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	Variable_init
	move	$a0, $s1
	j	__VarList.head_epilogue
__VarList.head_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
VarList.tail:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid12
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 24
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid12:
	move	$a0, $s1
	lw	$s0, 8 ($s1)
	lw	$s0, 0 ($s0)
	jalr	$s0
	move	$s1, $a0
	la	$s1, VarList_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	VarList_init
	move	$a0, $s1
	j	__VarList.tail_epilogue
__VarList.tail_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s1 
# To spill: 
VarList.add:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 8 ($fp)
	la	$s2, VarListNE_protObj
	move	$a0, $s2
	jal	Object.copy
	move	$s2, $a0
	jal	VarListNE_init
	bnez	$s2, dispatch_notvoid13
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 25
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid13:
	move	$s3, $s1
	move	$s1, $s0
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 48 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$a0, $s2
	j	__VarList.add_epilogue
__VarList.add_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 12
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s0 
# To spill: 
VarList.print:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid14
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 26
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid14:
	la	$s0, str_const1
	move	$a0, $s1
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s0, 8 ($s1)
	lw	$s0, 12 ($s0)
	jalr	$s0
	move	$s1, $a0
	move	$a0, $s1
	j	__VarList.print_epilogue
__VarList.print_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Expr.print_self:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid15
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 116
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid15:
	la	$s2, str_const3
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid16
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 117
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid16:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 0 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Expr.print_self_epilogue
__Expr.print_self_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Expr.beta:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid17
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 125
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid17:
	la	$s2, str_const4
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid18
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 126
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid18:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 0 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Expr.beta_epilogue
__Expr.beta_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s1 VR3:$s1 VR4:$s2 
# To spill: 
Expr.substitute:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s1, 8 ($fp)
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid19
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 134
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid19:
	la	$s2, str_const5
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid20
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 135
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid20:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 0 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Expr.substitute_epilogue
__Expr.substitute_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s1 VR3:$s1 VR4:$s2 
# To spill: 
Expr.gen_code:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s1, 8 ($fp)
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid21
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 143
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid21:
	la	$s2, str_const6
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid22
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 144
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid22:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 0 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Expr.gen_code_epilogue
__Expr.gen_code_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 VR2:$s1 VR3:$s2 VR4:$s1 
# To spill: 
Term.var:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s0, 8 ($fp)
	la	$s1, Variable_protObj
	move	$a0, $s1
	jal	Object.copy
	move	$s1, $a0
	jal	Variable_init
	move	$s2, $s1
	bnez	$s2, dispatch_notvoid23
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 341
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid23:
	move	$s1, $s0
	move	$a0, $s2
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s1, 8 ($s2)
	lw	$s1, 44 ($s1)
	jalr	$s1
	move	$s2, $a0
	move	$s1, $s2
	move	$a0, $s1
	j	__Term.var_epilogue
__Term.var_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 12
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 VR2:$s1 VR3:$s2 VR4:$s3 VR5:$s2 VR6:$s0 
# To spill: 
Term.lam:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s0, 12 ($fp)
	lw	$s1, 8 ($fp)
	la	$s2, Lambda_protObj
	move	$a0, $s2
	jal	Object.copy
	move	$s2, $a0
	jal	Lambda_init
	move	$s3, $s2
	bnez	$s3, dispatch_notvoid24
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 346
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid24:
	move	$s2, $s0
	move	$s0, $s1
	move	$a0, $s3
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s3)
	lw	$s2, 44 ($s2)
	jalr	$s2
	move	$s3, $a0
	move	$s2, $s3
	move	$a0, $s2
	j	__Term.lam_epilogue
__Term.lam_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 VR2:$s1 VR3:$s2 VR4:$s3 VR5:$s2 VR6:$s0 
# To spill: 
Term.app:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s0, 12 ($fp)
	lw	$s1, 8 ($fp)
	la	$s2, App_protObj
	move	$a0, $s2
	jal	Object.copy
	move	$s2, $a0
	jal	App_init
	move	$s3, $s2
	bnez	$s3, dispatch_notvoid25
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 351
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid25:
	move	$s2, $s0
	move	$s0, $s1
	move	$a0, $s3
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s3)
	lw	$s2, 44 ($s2)
	jalr	$s2
	move	$s3, $a0
	move	$s2, $s3
	move	$a0, $s2
	j	__Term.app_epilogue
__Term.app_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s0 VR4:$s3 
# To spill: 
Term.i:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid26
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 358
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid26:
	la	$s2, str_const35
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s2, $s0
	bnez	$s2, dispatch_notvoid27
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 359
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid27:
	move	$s0, $s1
	move	$s3, $s1
	move	$a0, $s2
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s0, 8 ($s2)
	lw	$s0, 32 ($s0)
	jalr	$s0
	move	$s2, $a0
	move	$s1, $s2
	move	$a0, $s1
	j	__Term.i_epilogue
__Term.i_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 VR6:$s0 VR7:$s6 
# To spill: 
Term.k:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid28
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 363
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid28:
	la	$s2, str_const35
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s2, $s0
	bnez	$s2, dispatch_notvoid29
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 364
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid29:
	la	$s3, str_const36
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 28 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid30
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 365
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid30:
	move	$s4, $s1
	move	$s5, $s0
	bnez	$s5, dispatch_notvoid31
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 365
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid31:
	move	$s0, $s2
	move	$s6, $s1
	move	$a0, $s5
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s0, 8 ($s5)
	lw	$s0, 32 ($s0)
	jalr	$s0
	move	$s5, $a0
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 32 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s2, $s3
	move	$s1, $s2
	move	$a0, $s1
	j	__Term.k_epilogue
__Term.k_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s6, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR8:$s2 VR9:$s3 VR10:$s4 VR11:$s5 VR12:$s6 VR13:$s1 VR14:$s0 
# To spill: VR2 VR3 VR4 VR5 VR6 VR7 
Term.s:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	addi	 $sp, $sp, -24
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid32
	la	$t0, str_const0
	sw	$t0, -4 ($fp)
	lw	$t0, -4 ($fp)
	move	$a0, $t0
	li	$t0, 369
	sw	$t0, -4 ($fp)
	lw	$t0, -4 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid32:
	la	$t0, str_const35
	sw	$t0, -4 ($fp)
	move	$a0, $s1
	lw	$t0, -4 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, 8 ($s1)
	sw	$t0, -4 ($fp)
	lw	$t0, -4 ($fp)
	lw	$t0, 28 ($t0)
	sw	$t0, -4 ($fp)
	lw	$t0, -4 ($fp)
	jalr	$t0
	move	$s1, $a0
	move	$t0, $s0
	sw	$t0, -4 ($fp)
	lw	$t0, -4 ($fp)
	bnez	$t0, dispatch_notvoid33
	la	$t0, str_const0
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	li	$t0, 370
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid33:
	la	$t0, str_const36
	sw	$t0, -8 ($fp)
	lw	$t0, -4 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -4 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	lw	$t0, 28 ($t0)
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -4 ($fp)
	move	$t0, $s0
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid34
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 371
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid34:
	la	$t0, str_const37
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 28 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	move	$t0, $s0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid35
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 372
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid35:
	move	$t0, $s1
	sw	$t0, -16 ($fp)
	move	$t0, $s0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid36
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 372
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid36:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	move	$s2, $s0
	bnez	$s2, dispatch_notvoid37
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 372
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid37:
	lw	$t1, -8 ($fp)
	move	$s3, $t1
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid38
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 372
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid38:
	move	$s5, $s0
	bnez	$s5, dispatch_notvoid39
	la	$s6, str_const0
	move	$a0, $s6
	li	$s6, 372
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid39:
	move	$s6, $s1
	lw	$t1, -8 ($fp)
	move	$s1, $t1
	move	$a0, $s5
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s6, 8 ($s5)
	lw	$s6, 36 ($s6)
	jalr	$s6
	move	$s5, $a0
	move	$s6, $s0
	bnez	$s6, dispatch_notvoid40
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 372
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid40:
	lw	$t1, -4 ($fp)
	move	$s1, $t1
	lw	$t1, -8 ($fp)
	move	$s0, $t1
	move	$a0, $s6
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s1, 8 ($s6)
	lw	$s1, 36 ($s1)
	jalr	$s1
	move	$s6, $a0
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 36 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 32 ($s3)
	jalr	$s3
	move	$s2, $a0
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 32 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 32 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t1, -12 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t1, -8 ($fp)
	move	$t0, $t1
	sw	$t0, -4 ($fp)
	lw	$t1, -4 ($fp)
	move	$s1, $t1
	move	$a0, $s1
	j	__Term.s_epilogue
__Term.s_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s6, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 32
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 
# To spill: 
Main.beta_reduce:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 8 ($fp)
	move	$s2, $s0
	bnez	$s2, dispatch_notvoid41
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 387
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid41:
	la	$s3, str_const38
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 12 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$s2, $s1
	bnez	$s2, dispatch_notvoid42
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 388
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid42:
	move	$a0, $s2
	lw	$s3, 8 ($s2)
	lw	$s3, 28 ($s3)
	jalr	$s3
	move	$s2, $a0
	li	$s2, 0
	li	$s3, 0
loop_start0:
	move	$s4, $s2
	li	$t0, 1
	sub	$s4, $t0, $s4
	beqz	$s4, loop_end0
	move	$s4, $s1
	bnez	$s4, dispatch_notvoid43
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 394
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid43:
	move	$a0, $s4
	lw	$s5, 8 ($s4)
	lw	$s5, 32 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s3, $s4
	move	$s4, $s3
	move	$s5, $s1
	seq	$s4, $s4, $s5
	beqz	$s4, ite_false0
	li	$s4, 1
	move	$s2, $s4
	b	ite_end0
ite_false0:
	move	$s4, $s3
	move	$s1, $s4
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid44
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 400
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid44:
	la	$s5, str_const39
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s1
	bnez	$s4, dispatch_notvoid45
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 401
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid45:
	move	$a0, $s4
	lw	$s5, 8 ($s4)
	lw	$s5, 28 ($s5)
	jalr	$s5
	move	$s4, $a0
ite_end0:
	b	loop_start0
loop_end0:
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid46
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 406
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid46:
	la	$s5, str_const1
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s1
	move	$s3, $s4
	move	$s2, $s3
	move	$a0, $s2
	j	__Main.beta_reduce_epilogue
__Main.beta_reduce_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 12
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Main.eval_class:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid47
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 414
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid47:
	la	$s2, str_const40
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid48
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 415
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid48:
	la	$s2, str_const41
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid49
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 416
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid49:
	la	$s2, str_const23
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$a0, $s1
	j	__Main.eval_class_epilogue
__Main.eval_class_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Main.closure_class:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid50
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 422
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid50:
	la	$s2, str_const42
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid51
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 423
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid51:
	la	$s2, str_const43
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid52
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 424
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid52:
	la	$s2, str_const44
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid53
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 425
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid53:
	la	$s2, str_const45
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid54
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 426
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid54:
	la	$s2, str_const46
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid55
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 427
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid55:
	la	$s2, str_const47
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid56
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 428
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid56:
	la	$s2, str_const48
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid57
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 429
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid57:
	la	$s2, str_const23
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$a0, $s1
	j	__Main.closure_class_epilogue
__Main.closure_class_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s1 VR6:$s5 VR7:$s6 VR8:$s4 VR9:$s3 
# To spill: 
Main.gen_code:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 8 ($fp)
	la	$s2, LambdaListRef_protObj
	move	$a0, $s2
	jal	Object.copy
	move	$s2, $a0
	jal	LambdaListRef_init
	bnez	$s2, dispatch_notvoid58
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 434
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid58:
	move	$a0, $s2
	lw	$s3, 8 ($s2)
	lw	$s3, 28 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid59
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 436
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid59:
	la	$s4, str_const49
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s1
	bnez	$s3, dispatch_notvoid60
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 437
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid60:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 28 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid61
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 438
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid61:
	la	$s4, str_const50
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid62
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 439
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid62:
	la	$s4, str_const51
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid63
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 440
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid63:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 56 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid64
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 441
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid64:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 60 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid65
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 442
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid65:
	la	$s4, str_const52
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid66
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 443
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid66:
	la	$s4, str_const53
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s1
	bnez	$s3, dispatch_notvoid67
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 444
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid67:
	la	$s4, VarList_protObj
	move	$a0, $s4
	jal	Object.copy
	move	$s4, $a0
	jal	VarList_init
	move	$s1, $s2
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 40 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid68
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 445
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid68:
	la	$s4, str_const54
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
loop_start1:
	move	$s3, $s2
	bnez	$s3, dispatch_notvoid69
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 446
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid69:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	li	$t0, 1
	sub	$s3, $t0, $s3
	beqz	$s3, loop_end1
	move	$s3, $s2
	bnez	$s3, dispatch_notvoid70
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 447
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid70:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 16 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s4, $s2
	bnez	$s4, dispatch_notvoid71
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 448
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid71:
	move	$a0, $s4
	lw	$s1, 8 ($s4)
	lw	$s1, 20 ($s1)
	jalr	$s1
	move	$s4, $a0
	move	$s1, $s2
	bnez	$s1, dispatch_notvoid72
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 449
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid72:
	move	$a0, $s1
	lw	$s5, 8 ($s1)
	lw	$s5, 24 ($s5)
	jalr	$s5
	move	$s1, $a0
	move	$s5, $s2
	bnez	$s5, dispatch_notvoid73
	la	$s6, str_const0
	move	$a0, $s6
	li	$s6, 451
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid73:
	move	$a0, $s5
	lw	$s6, 8 ($s5)
	lw	$s6, 36 ($s6)
	jalr	$s6
	move	$s5, $a0
	move	$s5, $s4
	bnez	$s5, dispatch_notvoid74
	la	$s6, str_const0
	move	$a0, $s6
	li	$s6, 452
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid74:
	move	$s6, $s1
	move	$s4, $s3
	move	$s3, $s2
	move	$a0, $s5
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s6, 8 ($s5)
	lw	$s6, 52 ($s6)
	jalr	$s6
	move	$s5, $a0
	move	$s1, $s5
	move	$s4, $s1
	move	$s3, $s4
	b	loop_start1
loop_end1:
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid75
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 455
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid75:
	la	$s4, str_const50
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s2, $s3
	move	$a0, $s2
	j	__Main.gen_code_epilogue
__Main.gen_code_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s6, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 12
	jr	$ra

# Mapping: VR6:$s0 VR7:$s1 VR8:$s2 VR9:$s3 VR10:$s4 VR11:$s5 VR12:$s6 
# To spill: VR0 VR1 VR2 VR3 VR4 VR5 
Main.main:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	addi	 $sp, $sp, -24
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi $sp, $sp, -4
	move	$t0, $a0
	sw	$t0, -4 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid76
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 461
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid76:
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid77
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 461
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid77:
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 28 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid78
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 462
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid78:
	la	$t0, str_const1
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 12 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid79
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 463
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid79:
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 44 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid80
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 463
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid80:
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 28 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid81
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 464
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid81:
	la	$t0, str_const1
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 12 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid82
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 465
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid82:
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 48 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid83
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 465
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid83:
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 28 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid84
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 466
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid84:
	la	$t0, str_const1
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 12 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid85
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 467
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid85:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid86
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 467
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid86:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	bnez	$t0, dispatch_notvoid87
	la	$t0, str_const0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	li	$t0, 467
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid87:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid88
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 467
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid88:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid89
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 467
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid89:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 48 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t1, -4 ($fp)
	move	$s0, $t1
	bnez	$s0, dispatch_notvoid90
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 467
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid90:
	move	$a0, $s0
	lw	$s1, 8 ($s0)
	lw	$s1, 44 ($s1)
	jalr	$s1
	move	$s0, $a0
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid91
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 467
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid91:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 40 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -16 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -16 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid92
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 467
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid92:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 52 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid93
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 468
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid93:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid94
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 468
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid94:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	bnez	$t0, dispatch_notvoid95
	la	$t0, str_const0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	li	$t0, 468
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid95:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid96
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 468
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid96:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 44 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid97
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 468
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid97:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 40 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -16 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -16 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid98
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 468
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid98:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 52 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid99
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 469
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid99:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid100
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 469
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid100:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	bnez	$t0, dispatch_notvoid101
	la	$t0, str_const0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	li	$t0, 469
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid101:
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -16 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid102
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 469
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid102:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 64 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid103
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 470
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid103:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid104
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 470
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid104:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	bnez	$t0, dispatch_notvoid105
	la	$t0, str_const0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	li	$t0, 470
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid105:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid106
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 470
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid106:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid107
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 470
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid107:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 48 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t1, -4 ($fp)
	move	$s0, $t1
	bnez	$s0, dispatch_notvoid108
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 470
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid108:
	move	$a0, $s0
	lw	$s1, 8 ($s0)
	lw	$s1, 44 ($s1)
	jalr	$s1
	move	$s0, $a0
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid109
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 470
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid109:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 40 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -16 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -16 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid110
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 470
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid110:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 64 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid111
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 471
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid111:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid112
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 471
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid112:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	bnez	$t0, dispatch_notvoid113
	la	$t0, str_const0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	li	$t0, 471
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid113:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid114
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 471
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid114:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid115
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 471
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid115:
	lw	$t1, -4 ($fp)
	move	$s0, $t1
	bnez	$s0, dispatch_notvoid116
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 471
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid116:
	lw	$t1, -4 ($fp)
	move	$s1, $t1
	bnez	$s1, dispatch_notvoid117
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 471
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid117:
	lw	$t1, -4 ($fp)
	move	$s2, $t1
	bnez	$s2, dispatch_notvoid118
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 471
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid118:
	lw	$t1, -4 ($fp)
	move	$s3, $t1
	bnez	$s3, dispatch_notvoid119
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 471
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid119:
	lw	$t1, -4 ($fp)
	move	$s4, $t1
	bnez	$s4, dispatch_notvoid120
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 471
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid120:
	move	$a0, $s4
	lw	$s5, 8 ($s4)
	lw	$s5, 40 ($s5)
	jalr	$s5
	move	$s4, $a0
	lw	$t1, -4 ($fp)
	move	$s5, $t1
	bnez	$s5, dispatch_notvoid121
	la	$s6, str_const0
	move	$a0, $s6
	li	$s6, 471
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid121:
	move	$a0, $s5
	lw	$s6, 8 ($s5)
	lw	$s6, 44 ($s6)
	jalr	$s6
	move	$s5, $a0
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 36 ($s4)
	jalr	$s4
	move	$s3, $a0
	lw	$t1, -4 ($fp)
	move	$s4, $t1
	bnez	$s4, dispatch_notvoid122
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 471
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid122:
	move	$a0, $s4
	lw	$s5, 8 ($s4)
	lw	$s5, 48 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 36 ($s3)
	jalr	$s3
	move	$s2, $a0
	lw	$t1, -4 ($fp)
	move	$s3, $t1
	bnez	$s3, dispatch_notvoid123
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 471
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid123:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 48 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 36 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$t1, -4 ($fp)
	move	$s2, $t1
	bnez	$s2, dispatch_notvoid124
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 472
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid124:
	move	$a0, $s2
	lw	$s3, 8 ($s2)
	lw	$s3, 44 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$a0, $s0
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s1, 8 ($s0)
	lw	$s1, 36 ($s1)
	jalr	$s1
	move	$s0, $a0
	lw	$t1, -4 ($fp)
	move	$s1, $t1
	bnez	$s1, dispatch_notvoid125
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 472
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid125:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 48 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 36 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t1, -4 ($fp)
	move	$s0, $t1
	bnez	$s0, dispatch_notvoid126
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 472
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid126:
	move	$a0, $s0
	lw	$s1, 8 ($s0)
	lw	$s1, 40 ($s1)
	jalr	$s1
	move	$s0, $a0
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid127
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 472
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid127:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 44 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -16 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -16 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid128
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 472
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid128:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 64 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	bnez	$t0, dispatch_notvoid129
	la	$t0, str_const0
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	li	$t0, 473
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid129:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	bnez	$t0, dispatch_notvoid130
	la	$t0, str_const0
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	li	$t0, 473
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid130:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	bnez	$t0, dispatch_notvoid131
	la	$t0, str_const0
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	li	$t0, 473
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid131:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid132
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 473
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid132:
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 40 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid133
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 473
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid133:
	lw	$t1, -4 ($fp)
	move	$s0, $t1
	bnez	$s0, dispatch_notvoid134
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 473
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid134:
	move	$a0, $s0
	lw	$s1, 8 ($s0)
	lw	$s1, 44 ($s1)
	jalr	$s1
	move	$s0, $a0
	lw	$t1, -4 ($fp)
	move	$s1, $t1
	bnez	$s1, dispatch_notvoid135
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 473
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid135:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 48 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 36 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t0, -16 ($fp)
	move	$a0, $t0
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -16 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -16 ($fp)
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -20 ($fp)
	lw	$t0, -20 ($fp)
	bnez	$t0, dispatch_notvoid136
	la	$t0, str_const0
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	li	$t0, 473
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid136:
	lw	$t1, -4 ($fp)
	move	$t0, $t1
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	bnez	$t0, dispatch_notvoid137
	la	$s0, str_const0
	move	$a0, $s0
	li	$s0, 473
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid137:
	lw	$t0, -24 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	lw	$s0, 8 ($t0)
	lw	$s0, 44 ($s0)
	jalr	$s0
	move	$t0, $a0
	sw	$t0, -24 ($fp)
	lw	$t1, -4 ($fp)
	move	$s0, $t1
	bnez	$s0, dispatch_notvoid138
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 473
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid138:
	lw	$t1, -4 ($fp)
	move	$s1, $t1
	bnez	$s1, dispatch_notvoid139
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 473
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid139:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 48 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$t1, -4 ($fp)
	move	$s2, $t1
	bnez	$s2, dispatch_notvoid140
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 473
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid140:
	move	$a0, $s2
	lw	$s3, 8 ($s2)
	lw	$s3, 48 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$a0, $s0
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s1, 8 ($s0)
	lw	$s1, 36 ($s1)
	jalr	$s1
	move	$s0, $a0
	lw	$t0, -20 ($fp)
	move	$a0, $t0
	lw	$t0, -24 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -24 ($fp)
	lw	$t0, -24 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -20 ($fp)
	lw	$t0, -12 ($fp)
	move	$a0, $t0
	lw	$t0, -16 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -20 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -12 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	lw	$t0, 36 ($t0)
	sw	$t0, -16 ($fp)
	lw	$t0, -16 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -12 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	lw	$t0, -12 ($fp)
	sw	$t0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$t0, -8 ($fp)
	lw	$t0, 8 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	lw	$t0, 64 ($t0)
	sw	$t0, -12 ($fp)
	lw	$t0, -12 ($fp)
	jalr	$t0
	move	$t0, $a0
	sw	$t0, -8 ($fp)
	li	$t0, 0
	sw	$t0, -8 ($fp)
	lw	$t0, -8 ($fp)
	move	$a0, $t0
	j	__Main.main_epilogue
__Main.main_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s6, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 32
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Variable.print_self:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid141
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 164
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid141:
	lw	$s2, 12 ($s0)
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$a0, $s1
	j	__Variable.print_self_epilogue
__Variable.print_self_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
Variable.beta:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Variable.beta_epilogue
__Variable.beta_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s1 
# To spill: 
Variable.substitute:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s1
	move	$s1, $s0
	seq	$s3, $s3, $s1
	beqz	$s3, ite_false1
	move	$s3, $s2
	b	ite_end1
ite_false1:
	move	$s3, $s0
ite_end1:
	move	$a0, $s3
	j	__Variable.substitute_epilogue
__Variable.substitute_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s2 VR4:$s1 VR5:$s3 
# To spill: 
Variable.gen_code:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s2, $s1
loop_start2:
	move	$s1, $s2
	bnez	$s1, dispatch_notvoid142
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 175
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid142:
	move	$a0, $s1
	lw	$s3, 8 ($s1)
	lw	$s3, 28 ($s3)
	jalr	$s3
	move	$s1, $a0
	beqz	$s1, ite_false2
	li	$s1, 0
	b	ite_end2
ite_false2:
	move	$s1, $s2
	bnez	$s1, dispatch_notvoid143
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 178
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid143:
	move	$a0, $s1
	lw	$s3, 8 ($s1)
	lw	$s3, 32 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s3, $s0
	seq	$s1, $s1, $s3
	li	$t0, 1
	sub	$s1, $t0, $s1
ite_end2:
	beqz	$s1, loop_end2
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid144
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 180
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid144:
	la	$s3, str_const7
	move	$a0, $s1
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s1)
	lw	$s3, 12 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s1, $s2
	bnez	$s1, dispatch_notvoid145
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 181
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid145:
	move	$a0, $s1
	lw	$s3, 8 ($s1)
	lw	$s3, 36 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s2, $s1
	b	loop_start2
loop_end2:
	move	$s1, $s2
	bnez	$s1, dispatch_notvoid146
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 184
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid146:
	move	$a0, $s1
	lw	$s3, 8 ($s1)
	lw	$s3, 28 ($s3)
	jalr	$s3
	move	$s1, $a0
	beqz	$s1, ite_false3
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid147
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 185
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid147:
	la	$s3, str_const8
	move	$a0, $s1
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s1)
	lw	$s3, 12 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid148
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 186
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid148:
	move	$a0, $s1
	lw	$s3, 8 ($s1)
	lw	$s3, 28 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid149
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 187
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid149:
	la	$s3, str_const1
	move	$a0, $s1
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s1)
	lw	$s3, 12 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid150
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 188
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid150:
	move	$a0, $s1
	lw	$s3, 8 ($s1)
	lw	$s3, 0 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s1, $s0
	b	ite_end3
ite_false3:
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid151
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 192
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid151:
	la	$s3, str_const9
	move	$a0, $s1
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s1)
	lw	$s3, 12 ($s3)
	jalr	$s3
	move	$s1, $a0
ite_end3:
	move	$s2, $s1
	move	$a0, $s2
	j	__Variable.gen_code_epilogue
__Variable.gen_code_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Variable.init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 8 ($fp)
	move	$s2, $s1
	sw	$s2, 12 ($s0)
	move	$s2, $s0
	move	$a0, $s2
	j	__Variable.init_epilogue
__Variable.init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 12
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
Lambda.print_self:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid152
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 215
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid152:
	la	$s2, str_const10
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$s1, 12 ($s0)
	bnez	$s1, dispatch_notvoid153
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 216
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid153:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid154
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 217
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid154:
	la	$s2, str_const11
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid155
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 218
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid155:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Lambda.print_self_epilogue
__Lambda.print_self_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
Lambda.beta:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__Lambda.beta_epilogue
__Lambda.beta_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s1 VR6:$s2 VR7:$s0 
# To spill: 
Lambda.substitute:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s1
	lw	$s4, 12 ($s0)
	seq	$s3, $s3, $s4
	beqz	$s3, ite_false4
	move	$s3, $s0
	b	ite_end4
ite_false4:
	lw	$s3, 16 ($s0)
	bnez	$s3, dispatch_notvoid156
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 234
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid156:
	move	$s4, $s1
	move	$s1, $s2
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 36 ($s4)
	jalr	$s4
	move	$s3, $a0
	la	$s4, Lambda_protObj
	move	$a0, $s4
	jal	Object.copy
	move	$s4, $a0
	jal	Lambda_init
	move	$s1, $s4
	bnez	$s1, dispatch_notvoid157
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 236
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid157:
	lw	$s2, 12 ($s0)
	move	$s0, $s3
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 44 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s4, $s1
	move	$s3, $s4
ite_end4:
	move	$a0, $s3
	j	__Lambda.substitute_epilogue
__Lambda.substitute_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s2 VR6:$s5 
# To spill: 
Lambda.gen_code:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid158
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 242
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid158:
	la	$s4, str_const12
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid159
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 243
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid159:
	move	$s4, $s2
	bnez	$s4, dispatch_notvoid160
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 243
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid160:
	move	$s2, $s1
	move	$s5, $s0
	move	$a0, $s4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s4)
	lw	$s2, 32 ($s2)
	jalr	$s2
	move	$s4, $a0
	la	$s2, Int_protObj
	move	$a0, $s2
	jal	Object.copy
	move	$s2, $a0
	sw	$s4, 12 ($s2)
	move	$s4, $s2
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 16 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid161
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 244
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid161:
	la	$s4, str_const13
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s1
	bnez	$s3, dispatch_notvoid162
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 245
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid162:
	move	$a0, $s3
	lw	$s4, 8 ($s3)
	lw	$s4, 28 ($s4)
	jalr	$s4
	move	$s3, $a0
	beqz	$s3, ite_false5
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid163
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 246
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid163:
	la	$s4, str_const14
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	b	ite_end5
ite_false5:
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid164
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 248
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid164:
	la	$s4, str_const15
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
ite_end5:
	move	$s3, $s0
	move	$a0, $s3
	j	__Lambda.gen_code_epilogue
__Lambda.gen_code_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 
# To spill: 
Lambda.init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s1
	sw	$s3, 12 ($s0)
	move	$s3, $s2
	sw	$s3, 16 ($s0)
	move	$s3, $s0
	move	$a0, $s3
	j	__Lambda.init_epilogue
__Lambda.init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s0 
# To spill: 
Lambda.apply:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 8 ($fp)
	lw	$s2, 16 ($s0)
	bnez	$s2, dispatch_notvoid165
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 226
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid165:
	lw	$s3, 12 ($s0)
	move	$s0, $s1
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 36 ($s3)
	jalr	$s3
	move	$s2, $a0
	move	$a0, $s2
	j	__Lambda.apply_epilogue
__Lambda.apply_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 12
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 VR6:$s6 
# To spill: 
Lambda.gen_closure_code:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($fp)
	lw	$s2, 12 ($fp)
	lw	$s3, 8 ($fp)
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid166
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 256
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid166:
	la	$s5, str_const16
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid167
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 257
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid167:
	move	$s5, $s1
	la	$s6, Int_protObj
	move	$a0, $s6
	jal	Object.copy
	move	$s6, $a0
	sw	$s5, 12 ($s6)
	move	$s5, $s6
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 16 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid168
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 258
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid168:
	la	$s5, str_const17
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid169
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 259
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid169:
	la	$s5, str_const18
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid170
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 260
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid170:
	la	$s5, str_const19
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid171
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 261
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid171:
	move	$s5, $s1
	la	$s6, Int_protObj
	move	$a0, $s6
	jal	Object.copy
	move	$s6, $a0
	sw	$s5, 12 ($s6)
	move	$s5, $s6
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 16 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid172
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 262
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid172:
	la	$s5, str_const20
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid173
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 263
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid173:
	la	$s5, str_const21
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	lw	$s4, 16 ($s0)
	bnez	$s4, dispatch_notvoid174
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 264
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid174:
	move	$s5, $s2
	bnez	$s5, dispatch_notvoid175
	la	$s6, str_const0
	move	$a0, $s6
	li	$s6, 264
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid175:
	lw	$s6, 12 ($s0)
	move	$a0, $s5
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s6, 8 ($s5)
	lw	$s6, 40 ($s6)
	jalr	$s6
	move	$s5, $a0
	move	$s6, $s3
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s6, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 40 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid176
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 265
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid176:
	la	$s5, str_const22
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$s4, $s0
	bnez	$s4, dispatch_notvoid177
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 266
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid177:
	la	$s5, str_const23
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 12 ($s5)
	jalr	$s5
	move	$s4, $a0
	move	$a0, $s4
	j	__Lambda.gen_closure_code_epilogue
__Lambda.gen_closure_code_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s6, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 20
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
App.print_self:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid178
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 288
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid178:
	la	$s2, str_const24
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$s1, 12 ($s0)
	bnez	$s1, dispatch_notvoid179
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 289
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid179:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid180
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 290
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid180:
	la	$s2, str_const25
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid181
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 291
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid181:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid182
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 292
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid182:
	la	$s2, str_const26
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__App.print_self_epilogue
__App.print_self_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s1 VR5:$s3 VR6:$s4 
# To spill: 
App.beta:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($s0)
	bnez	$s1, case0_notvoid
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 298
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_case_handler
case0_notvoid:
	lw	$s2, 0 ($s1)
case0_tag13:
	seq	$s3, $s2, 13
	beqz	$s3, case0_tag9
	move	$s2, $s1
	bnez	$s2, dispatch_notvoid183
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 299
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid183:
	lw	$s3, 16 ($s0)
	move	$a0, $s2
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s2)
	lw	$s3, 48 ($s3)
	jalr	$s3
	move	$s2, $a0
	b	case0_end
case0_tag9:
	slt	$s3, $s2, 9
	bnez	$s3, case0_error
	li	$t0, 14
	slt	$s3, $t0, $s2
	bnez	$s3, case0_error
	lw	$s2, 12 ($s0)
	bnez	$s2, dispatch_notvoid184
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 301
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid184:
	move	$a0, $s2
	lw	$s3, 8 ($s2)
	lw	$s3, 32 ($s3)
	jalr	$s3
	move	$s2, $a0
	la	$s3, App_protObj
	move	$a0, $s3
	jal	Object.copy
	move	$s3, $a0
	jal	App_init
	move	$s1, $s3
	bnez	$s1, dispatch_notvoid185
	la	$s3, str_const0
	move	$a0, $s3
	li	$s3, 303
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid185:
	move	$s3, $s2
	lw	$s4, 16 ($s0)
	move	$a0, $s1
	sw	$s3, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s3, 8 ($s1)
	lw	$s3, 44 ($s3)
	jalr	$s3
	move	$s1, $a0
	move	$s3, $s1
	move	$s2, $s3
	b	case0_end
case0_error:
	move	$a0, $s1
	jal	_case_abort
case0_end:
	move	$s1, $s2
	move	$a0, $s1
	j	__App.beta_epilogue
__App.beta_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 VR6:$s0 VR7:$s1 VR8:$s2 
# To spill: 
App.substitute:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	lw	$s3, 12 ($s0)
	bnez	$s3, dispatch_notvoid186
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 308
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid186:
	move	$s4, $s1
	move	$s5, $s2
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 36 ($s4)
	jalr	$s4
	move	$s3, $a0
	lw	$s4, 16 ($s0)
	bnez	$s4, dispatch_notvoid187
	la	$s5, str_const0
	move	$a0, $s5
	li	$s5, 309
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid187:
	move	$s5, $s1
	move	$s0, $s2
	move	$a0, $s4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s0, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s5, 8 ($s4)
	lw	$s5, 36 ($s5)
	jalr	$s5
	move	$s4, $a0
	la	$s5, App_protObj
	move	$a0, $s5
	jal	Object.copy
	move	$s5, $a0
	jal	App_init
	move	$s0, $s5
	bnez	$s0, dispatch_notvoid188
	la	$s1, str_const0
	move	$a0, $s1
	li	$s1, 311
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid188:
	move	$s1, $s3
	move	$s2, $s4
	move	$a0, $s0
	sw	$s1, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s1, 8 ($s0)
	lw	$s1, 44 ($s1)
	jalr	$s1
	move	$s0, $a0
	move	$s5, $s0
	move	$s4, $s5
	move	$s3, $s4
	move	$a0, $s3
	j	__App.substitute_epilogue
__App.substitute_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 VR4:$s4 VR5:$s5 
# To spill: 
App.gen_code:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s4, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid189
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 316
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid189:
	la	$s4, str_const27
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	lw	$s3, 12 ($s0)
	bnez	$s3, dispatch_notvoid190
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 317
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid190:
	move	$s4, $s1
	move	$s5, $s2
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 40 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid191
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 318
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid191:
	la	$s4, str_const28
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid192
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 319
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid192:
	la	$s4, str_const29
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	lw	$s3, 16 ($s0)
	bnez	$s3, dispatch_notvoid193
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 320
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid193:
	move	$s4, $s1
	move	$s5, $s2
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	sw	$s5, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 40 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid194
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 321
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid194:
	la	$s4, str_const30
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid195
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 322
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid195:
	la	$s4, str_const31
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid196
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 323
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid196:
	la	$s4, str_const32
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid197
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 324
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid197:
	la	$s4, str_const33
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$s3, $s0
	bnez	$s3, dispatch_notvoid198
	la	$s4, str_const0
	move	$a0, $s4
	li	$s4, 325
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid198:
	la	$s4, str_const34
	move	$a0, $s3
	sw	$s4, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s4, 8 ($s3)
	lw	$s4, 12 ($s4)
	jalr	$s4
	move	$s3, $a0
	move	$a0, $s3
	j	__App.gen_code_epilogue
__App.gen_code_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s5, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s4, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 
# To spill: 
App.init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s1
	sw	$s3, 12 ($s0)
	move	$s3, $s2
	sw	$s3, 16 ($s0)
	move	$s3, $s0
	move	$a0, $s3
	j	__App.init_epilogue
__App.init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

# Mapping: VR0:$s0 VR1:$s0 
# To spill: 
VarListNE.isNil:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	li	$s0, 0
	move	$a0, $s0
	j	__VarListNE.isNil_epilogue
__VarListNE.isNil_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
VarListNE.head:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($s0)
	move	$a0, $s1
	j	__VarListNE.head_epilogue
__VarListNE.head_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 
# To spill: 
VarListNE.tail:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 16 ($s0)
	move	$a0, $s1
	j	__VarListNE.tail_epilogue
__VarListNE.tail_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 
# To spill: 
VarListNE.print:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($s0)
	bnez	$s1, dispatch_notvoid199
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 36
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid199:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 28 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	bnez	$s1, dispatch_notvoid200
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 36
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid200:
	la	$s2, str_const2
	move	$a0, $s1
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	lw	$s2, 8 ($s1)
	lw	$s2, 12 ($s2)
	jalr	$s2
	move	$s1, $a0
	lw	$s1, 16 ($s0)
	bnez	$s1, dispatch_notvoid201
	la	$s2, str_const0
	move	$a0, $s2
	li	$s2, 37
	sw	$s2, 0 ($sp)
	addi	$sp, $sp, -4
	jal	void_disp_handler
dispatch_notvoid201:
	move	$a0, $s1
	lw	$s2, 8 ($s1)
	lw	$s2, 44 ($s2)
	jalr	$s2
	move	$s1, $a0
	move	$s1, $s0
	move	$a0, $s1
	j	__VarListNE.print_epilogue
__VarListNE.print_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 8
	jr	$ra

# Mapping: VR0:$s0 VR1:$s1 VR2:$s2 VR3:$s3 
# To spill: 
VarListNE.init:
	addi	$sp, $sp, -8
	sw	$fp, 8 ($sp)
	sw	$ra, 4 ($sp)
	addi	$fp, $sp, 4
	## saving registers
	sw	$s0, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s1, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s2, 0 ($sp)
	addi $sp, $sp, -4
	sw	$s3, 0 ($sp)
	addi $sp, $sp, -4
	move	$s0, $a0
	lw	$s1, 12 ($fp)
	lw	$s2, 8 ($fp)
	move	$s3, $s1
	sw	$s3, 12 ($s0)
	move	$s3, $s2
	sw	$s3, 16 ($s0)
	move	$s3, $s0
	move	$a0, $s3
	j	__VarListNE.init_epilogue
__VarListNE.init_epilogue:
	## restoring registers
	addi $sp, $sp, 4
	lw	$s3, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s2, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s1, 0 ($sp)
	addi $sp, $sp, 4
	lw	$s0, 0 ($sp)
	lw	$ra, 0 ($fp)
	lw	$fp, 4 ($fp)
	addi	$sp, $sp, 16
	jr	$ra

